A Design Of Broad Bandwidth Monobit Receiver

With the increasing complexity of electronic warfare environment, a preferablydigital receiver must operate in broad bandwidth, be able to receive various signalswith high sensitivity and large dynamic range, the processing of these signals must bereal time for time critical applications. However, subject to the constrains of hardwaredevelopment, the requirements for this kind of receiver can not be achieved. MonobitReceiver is proposed as a workaround to solve this problem. It has lower-digit ADC andInstantaneous Frequency Measurement, so it can extract the frequency from potentialtargets in broad bandwidth. This paper studies the design of a large bandwidth monobitdigital receiver and improves the sampling methods and the Monobit frequencymeasurement algorithm. The systematic design of the proposed Monobit digital receiveris verified by simulink. This paper is arranged as follows.Chapter1introduced the background and significance of this article. Theintroduction of the development of concurrent hardware component is given firstfollowed by the relative theory of domestic and foreign research institutions.Chapter2focus on the monobit receiver which use a1-bit ADC. The using ofdither techniques to improve the performance of receiver is proposed, and a simulationexperiment verifies that the dither technique can improve the system’s dynamic range.The dither techniques is also used in comparison with the reference signal to get a roughestimate of the amplitude of the input signal. The effectiveness of this method t is alsoverified by simulation tests.Chapter3focus on the improvement and optimization of monobit frequencymeasurement arithmetic. Base on the characteristics of monobit receiver data processing,an optimization of approximately kernel, a sliding window method and a frequencymeasurement arithmetic are proposed, The simulation results show that by applyingthese improved methods, the workload of the data processing is reduced, theperformance of the dynamic range and false alarm probability are also improved. It canalso output a more precise frequency estimation result.Chapter4described the architecture design and simulation platform structures,thehardware simulation result is also given. The simulation platform is built with simulinktools, the platform structures are introduced in this chapter, its basic functions wereverified by simulation experiments and proved the feasibility of the proposed Monobitreceiver architecture.Chapter5is the summary of this article. It discussed the major contributions of thispaper and several possible directions of future development of the monobit receiver.