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Microblaze-based Cluster Design For32-core Processor

Posted on:2014-09-22Degree:MasterType:Thesis
Country:ChinaCandidate:J X MaFull Text:PDF
GTID:2268330422451874Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the development of chip manufacture and the production of multi-coreprocessor, the design method of integrated multiple processors on a chip has beengradually accepted and favored by people. Along comes NoC. The traditionalarchitecture of NoC in which each PE only has one core can’t make the best of routerbandwidth and may cause wasting of resources. The cluster with multiple processorscan solve these problems and improve the performance of NoC-based MPSoC.The paper adopts of shared-memory and shared-bus methods to build a SMPstructure cluster which is based on four MicroBlaze soft-core processors. The busway of polling ensures that each processor has the equal rights to take the bus, andwill not conflict with each other. In order to manage the multi-threading applicationswhich are running on the multi-processor, considering the limitations of resources incluster,μC-OSⅡ real-time embedded operation system is ported into the cluster.The ported Operating System adopts a distributed multi-task scheduling strategybased on a global priority to support multi-task scheduling in the cluster. And themaster-slave scheme is used in the initialize stage of the system to cut down OSmemory footprint.To realize the multi-task parallel executing on the multi-core, the paperexpanded a task communication function for the inner-cluster based on the MMPIwhich applies to inter-cluster communication. By making full use of thecharacteristic of shared-memory within clusters, repeated reading or writing datafrom it are avoided and only transfer envelop is necessary which saves the cost ofstorage and improving the communication efficiency.According to the function characteristics of this system, system initialization,task scheduling, multi-task parallel and MMPI communication are tested. The resultof test proves the correctness of the system functions. Finally, the system is realizedon the Xilinx Virtex-6ML605. Although the cluster is based on the original32-coreNoC structure, its general structure makes it possible to be applied to other structureof multi-core processors with the help of a few changes. In addition, there are veryfew limitations of the application, which make its application prospect broad.
Keywords/Search Tags:MPSoC, Network-on-Chip, cluster, μC-OSⅡ, FPGA
PDF Full Text Request
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