Design Of Interface Control And Data Storage Logic On Carrier Board For DAQ FMC-based

As Large Scale Integration, FPGA technology and computer are promoted rapidly.The test instrument with modular design has become inevitable tendency. To meet thedifferent measurement requirements, adopting same hardware to realize multi-taskmeasurement has been a hot topic in the research of digital test system. While thefunction modulations, diversification of interface control, high sampling rate and largecapacity for data storage are the key point of the whole test system.FMC (FPGA Mezzanine Card) interface, based on FPGA technology, has becomethe most promising application in virtue of the improvement on scale and performanceof FPGA. However, comparing with ASIC, FPGA has poorer security. Because theconfiguration data of FPGA based on SRAM technology can be stolen easily, whichwould cause grievous pecuniary loss for designer. It is getting urgent to protect theintellectual property rights of FPGA design.According to the characteristics and application requirement of FMC real-timesampling system, this thesis specially shows the interface control module withencryption function design and high-sampling data memory module with active triggerdesign. The interface control module of FMC sampling module is special for theencryption recognition function and the data receiving&process while the datamemory module realizes the design of sampling memory controller which is based onthe IP Core of DDR3SDRAM. The thesis first presented and completed an encryptionauthentication method based on SHA-1algorithm to achieve the purpose of protectionof FPGA logic design; then designed the high-speed sampling memory controllerbased on DDR3SDRAM technology applications so as to improve the capture andresolution ability of the sampling system to conquer the key technology of thehigh-speed, high-capacity and fast trigger of the whole sampling system; Finally, thepaper shows the verification of the whole design content and provides the performancetest results. The high-speed sampling memory controller can conduct parallel triggerand store for four DDR3SDRAM chips simultaneously, and it can meet the highestsampling rate fully in system. Encryption authentication function can protect the intellectual property right of FPGA logic design effectively with good sense ofpromotion. Additionally, the thesis releases the final code via the form of a logicalproduct.