Hardware Architecture For Karaoke Sound Effect

With the progress of the VLSI (Very-Large-Scale integration) increased，ASIC(Application Specific Integrated Circuit) can be integrated more and more hardwarefunctional modules. Some need to quickly and sophisticated software algorithms forreal-time processing of the data is implemented in hardware. Algorithm using hardwareacceleration required to meet the following two conditions: First, this algorithm is usedwidely and basically. Takes the hardware area as consideration, it cost the cost of theproduct, so the need is more commonly used algorithms implemented in hardware to getthe obvious benefits. Second, the algorithm should have been stable since implementedin hardware, the modifications will become more difficult. This research project of KaraOK audio processing system hardware acceleration to meet the above two conditions.This article describes the implementation process of the of Karaoke audio effectprocessing system hardware accelerators. The design is derived from the companyproject, the first departure process from the understanding of the DVD system Karaokesound effect software processes through learning software code to understand thealgorithm of Karaoke sound effect. The use of the existing understanding of the entireDVD audio hardware system, combined with the control flow of the software tounderstand the process of software and hardware to cooperate with each other.Through the Karaoke sound algorithms for learning and according to thecompany’s indicators on the hardware accelerator system requirements, designed ahardware architecture to efficiently realize karaoke sound effect. Clearly define echechild module functionality of the architecture and the interface registers to implementeach sound data processing flow control.Last, from saving hardware consumption angle to find the most economicalmethod for the realization of the hardware area, wherein the innovative use of to controlthe read and write pointer means to achieve, the use of DRAM directly as a manner ofthe storage unit, to achieve a fixed delay on the sound data read delay changes and onthe sound data read. Using linear interpolation theory and the nature of the sine functionachieve the sine extended by256sine value of224points. Take the microphone input of the automatic gain control and energy compensation mechanism, and to reduce thenoise of the microphone input. Switch their gain control of the channel, Karaoke soundalgorithm.After about eight months to complete the design of hardware accelerators, andthrough the complete software simulation and FPGA verification test. This hardwareaccelerator consumes a very small area, is completed and before the software system toachieve the same functionaslity.