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Investigation On The Temperature Characteristics Of LDMOS Under ESD Stress

Posted on:2014-05-05Degree:MasterType:Thesis
Country:ChinaCandidate:D X WuFull Text:PDF
GTID:2268330401964525Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Electrostatic discharge (ESD), as well as electric overstress (EOS) is being aproblem that needs more and more concern in the integrated circuit industry. Accordingto the reports delivered several years ago. ESD problem had become more a concern notto be neglected as the trends to minimal line width, high integration level and moreadvanced process, such as light doped drain and silicidation, goes on. Generally, ESDimpact on circuit mainly manifested in two aspects, and on the one hand, high voltagelead to junction breakdown, gate and oxide and dielectric breakdown or rupture. On theother hand, high current causes silicon molten and metal interconnect lines broken dueto local hot spot caused by localized high current.In the first half of this article the importance of ESD protection is introduced, andthen common ESD equivalent models, the test models, methods and criteria are showed.Secondly two types of commonly used ESD protection device are presented. That isnon-snapback type, such as diode and resistance, and snapback one, such as bipolarjunction transistor (BJT), metal-oxide-semiconductor-field-effect-transistor (MOSFET),and silicon controlled rectifiers (SCR). And finally thermal diffusion equation andthermoelectric models are also presented.The second half predominantly focuses on quasi-static and transient simulation of40V gate grounded LDMOS devices through Sentaurus software developed by synopsis.To the two types of simulations, the internal heat accumulation process within thedevice and the level of performance are explained from mechanism. The structuresinclude LDMOS with different channel length, changed source to bulk tap spacing(SBS)and different brain engineering. Finally, common ESD design layouts are presented, andtheir advantages and disadvantages are compared. And according to the technologicalcharacteristics of this article, the layouts of the actual tape-out chip are presented, andtest results are given as the verifications of the numerous devices ESD simulationoutput.The simulation methods added in this article are different from conventional quasi-static simulations of devices and transient simulations of circuits, and are the firstattempt to investigate ESD heat accumulation and temperature characteristics throughtransient simulation.
Keywords/Search Tags:ESD, LDMOS, quasi-static and transient simulation, temperaturecharacteristics
PDF Full Text Request
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