Research On H.264Encoder And FPGA Implementation For Part Of The Algorithm

The H.264/AVC is a new video coding standard developed by the Joint VideoTeam. It combines the excellent performance algorithm used in previous standard andsome new coding techniques, which makes it has a higher coding efficiency, a betterimage quality and an increasingly wide range of applications in the field of mobilecommunication and digital storage etc. but the algorithm complexity of the H.264encoder is very high, which makes the FPGA implementation with the traditionalmethod very difficulty. So, in this paper, we research on the H.264encoder with a newtool.The H.264encoder is studied in this paper. Firstly, the key technologies of theencoder are analyzed with focus on integer transform, quantization and CAVLCentropy encoder to provide a theoretical guidline for hardware design. Secondly, basedon analysis, transform, quantization and its reconstruction pipeline architecture andCAVLC entropy encoder pipeline architecture are designed and algorithmic synthesistool Catapult SL Synthesis is used to implement the various modules of the design.Finally, ModelSim6.5simulation tool is used to do timing simulation and verificationfor each module, the EP2S15F484FPGA of Altera is selected to implement the design.All the modules in this paper are coded with synthesizable C++and implementedwith algorithmic synthesis tool, which makes it be able to easily adjust the hardwarearchitecture and integrated with other modules together. It has practical value inengineering application.