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FPGA Design And Implementation Of The Prime Field Multipliers

Posted on:2014-06-27Degree:MasterType:Thesis
Country:ChinaCandidate:R H ZhangFull Text:PDF
GTID:2268330401452864Subject:Cryptography
Abstract/Summary:PDF Full Text Request
With the rapidly growing popularity of the Internet, information security issueshave become increasingly prominent. Cryptographic techniques are core technology ofinformation security. Public key cryptography, especially elliptic curve cryptography(ECC) has been widely used, finite field arithmetic involved in ECC has become aresearch hotspot.Where multiplication is the most time-consuming, as well as the mostcritical operations. Researchment, design, and implementation of efficient multipliersthe realization show great significance of ECC implementation.ECC mainly studiesover the prime field, Prime domain Fp192is one of the five prime fields recommendedby NIST, the paper focus on the research and FPGA implementation of the multiplierover the prime domain Fp192.Adder is the basis of the multiplier, modulo operation is inevitable in themultiplier over the prime field. Therefore, addition and adder, modular arithmetic,multiplication and multiplier, modular multiplication and mold multiplier are studied inthis paper. All of them are designed and implemented on FPGA by hardwaredescription language. Then, a simple study of Montgomery modular exponentiationcomputing and its FPGA implementation are conducted. Besides, a packet adder isdesigned and implemented, a method which transfer data into Montgomery multipliertwice is developed, this method can eliminate the impact introduced by R-1of theMontgomery multiplication.Finally, experimental verifications with comparison and analysis in terms ofresources and speed of the design and the proposed method are conducted, as well asthe outlook for further study.
Keywords/Search Tags:Prime Field, Adder, Multiplier, FPGA implementation, Montgomery
PDF Full Text Request
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