FPGA Design And Implementation Of Digital Image Processing QR Code Identification System

Two-Dimensional Code technology has developed fast, and its applications are in a widerange today. Among various kinds of Two-Dimensional Code, QR code has been applied wider tocommercial, transportation delivery, sheets and receipts management and postal area etc. withsuch properties as fast-reading, wide angle recognition, high encoding efficiency and so on. QRcode is further widening its application range with its bright future.Currently, most QR code recognition systems are based on embedded system like ARM astheir major hardware platform. The QR image is collected by a camera, and then processed bysoftware. However, the limitation of the embedded system because of serial structure makes ithard to improve QR coder recognition better. With the demanding of more amount and fasterprocess speed, the major target for research on QR recognition system is to design a more reliableand faster system based on new hardware platform.The main purpose of this paper is to build a QR code recognition system, based on digitalimage process theories, as well as some algorithms related to QR coding and decoding, and theusage of Alter Cyclone II FPGA as main hardware platform. The system first gets its image from acamera, then goes through several steps such as filtering, Binarization, Location, moduleSampling, acquisition of format and version data, error correcting data, coding data, and Errordetection and correction, read character from QR code at last.The main content of the paper are as follow:1. In order to divide foreground and background better, and decrease information lossunder the uncertainty of light condition, this paper uses “Median filtering based on Windowstructure and Batcher’s Odd-Even Sort Network” and OTSU Binarization technology.2. Research on QR related algorithm such as Location, Sampling, etc. Optimization of thesystem hardware by research to balance the speed and area.3. The combination of digital logical design and NIOS II processor realizes MaskElimination and information acquisition, making the algorithm process more flexible.The further modification and improvement of the system is presented at the end of the paper.