Application Research Of Fractional Fourier Transform In Image Processing Based On FPGA

Fourier Transform (FT) is a commonly used digital signal processing tools, itcan be easily used to handle general stationary digital signals problem, but encounterbottlenecks while dealing with non-stationary signals; However, in practice we oftenmet with some complex non-stationary signals, and sometimes handling thesecomplex non-stationary issues is very important. Fractional Fourier Transform (FrFT)is a generalized form of the FT fractional power, it has much better anti-noiseperformance than classic FT, can much better extract information in a sea of noise, it’sa strong tool to analyze and deal with non-stationary signals. But most digital signalprocessing tools we usually used are based on FT algorithm,concerning that it can nothandle complex non-stationary signals, the text attempts to take advantage of FrFTexcellent anti-noise performance, research and design IP core based on FrFTalgorithm to develop a high-performance digital signal processing system to dealspecifically with these complex signal processing problems. In order to verify thecorrectness of the expected assumptions, the application of image filtering processingis completed.By the simulation waveforms and time-frequency transform contrast, theIP core based on FrFT algorithm can indeed better extract information from the noisethan the conventional IP core based on FT algorithm.Although FrFT has superior anti-noise performance than the classic FT, it has acomplex transformation nuclear, direct calculation is not easy, in the practicalapplication, real-time operation is poor,which hindered its application. After a reviewof the literature reported of FrFT defined nature of basic research status quo,according to the nature of FrFT propose a simple order processing, simplified FrFTcomputation, thus improving certain real time in aspects of the algorithm. Accordingto the formula analysis, the one-dimensional FrFT flow is achieved, and so for thetwo-dimensional FrFT flowchart to filter image noise. As running on software istime-consuming, so consider the Field Programmable Gate Array (FPGA) hardwareplatform; existing IP core development technology based on Matlab and Xilinx FPGAthrough the association to use System Generator tool both the joint development ofthe IP core based on FrFT algorithm, first inside Matlab write C code, build the modelsimulation, and then through the System Generator interface code into FPGA,automatic generation of the hardware description language, and then in Xilinx FPGAdevelopment environment using the ISE and EDK hardware and software co-designtechnology, in the implementation phase and gradually integrated simulation andfound that the problem,then goes back to the previous stage to eliminate errors, thusensuring the last generation IP core RTL code is correct. The joint use of Matlab andFPGA design approach is much more quickly and efficiently than using FPGA design alone, median filtering algorithm IP core verification throughout the design process toachieve this. According FrFT denoising features, design IP core with the system’s portparameters and data exchange mechanism, through the IP core CPU and systemsettings between two buffers, ensure the security of the system data while too late tosave temporary processing data. Finally FrFT FT denoising effect with the simulationand comparative study of time-frequency transform, validate FrFT algorithm based onIP core image denoising effect is indeed better than IP core based on conventional FTalgorithm.