Research And Design Of Low-power WSN Node Based On SOC

This thesis focuses on the application of wireless sensor network node and mostlyresearches the wireless sensor network node realization method and the design of low powerconsumption. Using SOC (system on chip) design, the FPGA development board has verified,realized the wireless sensor network node, which has the advantages of low power consumption,low cost and good performance.In the system design, this thesis firstly analysed a comprehensive theory of WSN (WirelessSensor Networks) node of the function and working principle. In order to meet the functionalrequirements of lower cost and power dissipation principle, this paper presents a wireless sensornetwork node SOC realization scheme. The system processing mechanism, structure, functionmodule circuit design closely integrated, so that each module is integrated into a chip, using SOCto design the high integration to reduce the volume of the design requirements. Secondly, thewireless sensor network node for transmitting data between a relatively small volume, theconfiguration node’s modules are the perfect design and function design of cutting, low poweroperating mode, further reducing the system cost and power consumption.In circuit design, digital circuit according to hierarchical, structural design idea, the systemtop has been divided to form, each node unit modules for the detailed design and simulationverification. Mainly it includes the processing unit, a communication module and FLASHnuclear. Focus on the processing core are extended interface and a storage unit expansion, thecommunication module improved, further improve the transmission rate. Design andimplementation of a processing unit controls the FLASH to read and write, processing unit andcommunication data transfer between modules, and use testbench to construct test environmentfor the conduct of the chronological and functional verification.The low power design, selection of low power consumption, structure is simplified theprocessing core, based on the functional requirements of the processing unit are properimprovement, design low power and idle mode to reduce the power consumption of system. Atthe RTL level design, code optimization, and optimization of circuit processing performance,from the level of the algorithm to reduce power consumption. This paper discussed the theory of wireless sensor network and the design of low power.And then based on the above theory, designd the wireless sensor network node based on SOC. Inaddition, according to the structural design, the wireless sensor network node for each moduleare designed and tested. Finally, verified the node in the FPGA development board, test resultsare given. Based on test results, the design of wireless sensor network node meet the functionalrequirements of the system and realized the design goals.