Research And Design Of Multi-core Processor System Based On FPGA

In recent years, there is an increasing demand for large amount of data processing inthe field of test and measurement, the requirement of real-time and accuracy of the dataprocessing in some complex test system is becoming higher and higher. At present, themajority of processors, such as SCM, Digital Signal Processor DSP have been unable tomeet the demand of the people. As the carrier of the design in SOC, Field ProgrammableGate Array FPGA has many advantages, such as small size, low power consumption, goodreliability and so on, the multi-core system based on FPGA can realize the cooperativework, so that it can effectively slove the problem of multi-channel data acquisition andhuge amount data parallel processing in the field of test and measurement.The article takes the Xilinx Spartan-3E development board as the platform of thedesign, and uses Xilinx ISE software and EDK kit to implement the overall design andhardware design of the on-chip multi-core interconnection which taking the32-bit softcoreMicroBlaze as the processor module, the software testing of the inter-core communicationand the performance comparison between the single-core and multi-core system are alsorealized. The major tasks are as follows:A multi-core processor system structure of single PLB bus which uses FSL tocommunicate is designed to optimize the utilization of the resource and increase the speedof the transmission between the cores; With the ISE software, the customizing FIFO iscreated on Xilinx Spartan-3E development board, taking the customizing FIFO asinter-core communication mechanisms, the multi-core processor hardware platform isbuilt on Xilinx Platform Studio XPS, the hardware configuration is aslo completed.Based on the hardware platform, the paper uses the online debugging tool XMD inXilinx SDK to display the result of communication after adding a test program on themulti-core system; the logic analyzer Chipscope Pro is employed to track the FPGA innersignal to realize on-chip debug.In order to implement the objective evaluation of the performance betweensingle-core and multi-core, the paper takes the two aspects of the execution time in algorithm and the sharing of resources into consideration, the results show that themulti-core system can optimize the processing time, because it takes parallel loop systemand abandons the waiting time in the blocking state of the single-core processor system;on the other hand, the resource utilization in multi-core system is higher than that insingle-core.