The Design Of The Power Parameter Monitor Base On FPGA

With the strong development of science and technology, energy has become animportant resource for development worldwide, and the wide spread application ofelectricity, laid the indispensable position. The invention of and application of aseries of high-tech equipment pairs of the quality of the electrical energy put forwarda higher demand, and Therefore, pairs of the power parameter monitoring equipmentto put forward a more stringent standard.This paper first describes the development of power parameter monitoringequipment and monitoring techniques at home and abroad.For power qualitymonitoring at this stage is the monitoring of the power harmonics, the primary meansof harmonic monitoring is converting the analog signal into digital, and then,usingdigital signal processing approach to computing derived analysis results, one of themost typical algorithm is the FFT spectrum analysis algorithm.Hardware designcommonly used by the microcontroller or DSP as the core, the work of itssingle-threaded mode, which greatly limits its real-time data processing speed.In this paper, the FPGA chip as the major hardware on custom NIOS Ⅱ embeddedcore, for the algorithm to optimize the data processing flow, the flow-throughmulti-threaded data processing, greatly improves the speed and accuracy of dataoperations. And build the module of FFT harmonic analysis algorithm in the FPGAchip directly connected with the NIOS core through the Avalon bus, thus ensuringdata transfer speed.For the rotation factor in the FFT butterfly algorithm, we take theresults of pre-calculated and deposited into the ROM, in the computing process, theuse of look-up table method is called directly, and reduce the amount of computationof the FFT algorithm, which can quickly complete the calculation of the results.In digital-analog conversion process, the non-synchronization of the referencefrequency and the sampling frequency caused the problem of spectral leakage andpicket fence effect. In this article, From the hardware design and software fixes toreduce the results of error.In the hardware circuit design, frequency synchronization,real-time sampling frequency, and real-time correction technology, the error appearsin a very small range; Software algorithm design, using windowing methods tosuppress the spectrum leak data error.After many tests, the results show that theHamming window can achieve better real-time and effect.Using the FPGA as the core design, it can be convenient to connect a variety of peripheral interfaces. This article within the FPGA build harmonic analysis, samplingcontrol, output, tri-state bus and host computer communication module. The wholesystem is highly integrated, peripheral expansion of less, thereby reducing the limit ofthe equipment upgrades for hardware, new algorithms and modules to facilitate futureupgrades and updates.