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Design And Realization For Communication Interface On Integrate Test Facility

Posted on:2014-01-29Degree:MasterType:Thesis
Country:ChinaCandidate:Y L HuFull Text:PDF
GTID:2252330401965871Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The integrated test system is designed for flight control aircraft groundsemi-physical simulation system, and the test ability of the integrated test system hasalso become one of the key indicators of the aircraft manufacturing industry. Integratedtest equipment connect through multi-channel serial bus and CAN bus to flight controlcomputer, data interaction. Comprehensive test equipment interface directly affect theperformance test results of the comprehensive test of the flight control system, meaningthe basis for simulation.This article is based on a research institute integrated test equipment upgradeproject requirements, combined with the integration and flexible design thinking,systematic, comprehensive study, a comprehensive test of the flight control systemcommunication interface design and realization. This article from the communicationinterface hardware design and control logic design two aspects of the implementationprocess:1. Depth study of the comprehensive test of the flight control system works,analyzed and summarized the significance of the design goals of integrated test systemcommunication interface design. Packet scheduling algorithm theory and its applicationin the design of the FPGA system transport layer.2. The proposed overall system design, design and development of the main circuitboard. Circuit board as the main framework for FPGA+ARM, FPGA interfacehardware as the master chip. RS232/RS422/RS485serial interface as the main externalphysical interface, and joined the CAN bus interface.3. Developed FPGA control logic. The RS232/RS422/RS485developed FPGAcontrol module, and properly send and receive serial data. Testing requirements forintegrated test system designed unknown serial baud rate detection, enhancedself-adaptability. Developed a CAN bus interface transceiver module, the buscommunication. The design and development of the system transport layer hierarchicallink sharing algorithm based on multi-lane serial data management, supplemented byround robin algorithm-based method, the advantages and disadvantages of the two algorithms complement, to ensure that the transmission system amount of eachtransmission channel bandwidth allocation fairness.4. USB communication. Using the ARM as USB core control chip, through thepreparation and device enumeration process descriptor settings, initialization routine tocomplete the preparation of the USB driver.Function of the control logic simulation, several hardware board debugging,integrated test system interface physical simulation and test equipment field simulationresults show that, the paper develops a comprehensive test system communicationinterface is highly integrated, fully functional, flexibility high maintenance, integratedtest equipment during the test cumbersome to install and does not meet the testenvironment testing process, reducing the number of unnecessary duplication of work.
Keywords/Search Tags:integrated test system, communication interface, baud rate recognitionserial, CAN bus, USB
PDF Full Text Request
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