Research And Design Of UHF RFID System’s Reader

Radio Frequency Identification （RFID） is a kind of technology which achieves non-contactautomatic identification of the target object through the Radio Frequency signal and by thetransmission characteristics of the spatial coupling. It can identify multiple targets simultaneouslyand has advantages of reading and writing flexibly with high speed and high safety performance.The process of identification does not need human intervention and it can automatically work in avariety of harsh environments.In this paper, on the basis of researching on the working principle of UHF RFID reader systemand relative technical standards, we analyze the reader’s architecture and design a reader based onISO18000₆C standard. The design includes two parts: digital baseband and RF.The digital baseband part is software design, using VHDL hardware description language. Theforward link is PIE encoding of the command from the reader to the tag. By designing a buffer, itrealizes the encoding of two symbols with different transmission speeds. Simulations illustrate itseffectiveness and feasibility. The return link which is from the tag to the reader implements thedecoding of Miller modulation subcarrier. We design a finite state machine which has strongcapability in error detecting. The RF part is hardware design. PLL frequency synthesizer providesthe local oscillation signal for forward and return link. The forward link innovatively uses PINdiodes as the RF switch to achieve ASK modulation of the baseband signal, and launchs the finalsignal after the power amplifier. The center frequency of output signal is910MHz, the output poweris greater than1W, and the modulation degree is greater than90%. The output RF signal has goodstability. The return link designs a zero-intermediate frequency （IF） receiver with IQ dual channels.The received signal is mixed, filterred and amplified, and then sent to the comparator for voltagejudgment. After that, we can retrieve baseband signal. The baseband signal maintains approximately50%duty cycle, and the error rate does not exceed10%. The results of ADS software simulationand hardware testing verify the correctness of the design, which meets ISO18000₆C protocolrequirements.