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The Optimization And Implementation Of GPON-AES With FPGA

Posted on:2014-02-06Degree:MasterType:Thesis
Country:ChinaCandidate:F ZhangFull Text:PDF
GTID:2248330395983860Subject:Optical Engineering
Abstract/Summary:PDF Full Text Request
As the high-speed development of the backbone networks, access networks have becomethe speed bottleneck of information network systems. GPON (Gigabit-Capable PON), whichhas many advatanges like high bandwidth, high efficiency, large coverage, and rich userinterfaces, become one of the main FTTH access networks. At present, GPON only supportsAES (advanced encryption standard) encryption algorithm. AES algorithm is used to replaceDES that NIST released as an encryption standard. After years of analysis and test, AES canresist various attacks with known methods. This paper uses advanced encryption standard (AES)as the core encryption algorithm, which is implemented by FPGA hardware as a data encryptionmodule. This module can be used to transmit data safely in GPON with the characteristics ofhigh flexibility, processing parallelism, big throughput and scalability.At first, According to the requirement of AES data encryption, select the type of FPGAchip, draw a schematic diagram, its correspongding PCB, and builds its hardware platform. Next,hardware description language Verilog HDL is conbined with principle diagram design to writeFPGA program and debug it. Program design is implemented by following the standard of AESencryption algorithm. A tradeoff between chip area and its performance needs to be decided. Inthe block diagram design, logic operation steps are segmented in details with pipeline to improvethe efficiency of the hardware. Finally, each module of the FPGA program is simulated, and thesimulation results comply with the requirements.In this paper, the FPGA realization of the AES algorithm is presented with a referencedesign scheme. First, the hardware platform, development language, hardware development tools,and software development tools for FPGA realization of AES algorithm,are introduced. Second,the overall design block diagram of GPON-AES module implementation scheme are given indetails, and then the function of each component and design. Finally, timing simulation, thedesign results and performance of GPON-AES module are presented.
Keywords/Search Tags:AES, FPGA, encryption, decryption, hardware implementation
PDF Full Text Request
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