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The Design Of24Bits AD Convertor

Posted on:2013-12-15Degree:MasterType:Thesis
Country:ChinaCandidate:D Q HuFull Text:PDF
GTID:2248330395974199Subject:Integrated circuit engineering
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The constant developments of electronic system give rise to the need of highresolution analog to digital converter. By the constraint of SAR ADC’s linear error,theSigma-Delta analog to digital converter are more popular than SAR analog to digitalconverter in the field of test system,medic treatment and mechanical sensor. Sigma-deltaconvertors become more and more popular via the development of CMOS technologiesin recent years. the Sigma-delta convertors are always used in the low frequency domainto resolve the Non-linearity problem of the tradition convertor.This dissertation based on the sigma-delta convertor theory.A architecturesigma-delta modulator which could perform24-bit precision has been analyzed, Thencircuit and layout have been designed, the design have been taped out and the devicehave been tested at the end. The analysis includes circuit design, layout design andtesting arithmetic.The dissertation is concerned about the investigating on sigma-delta convertortheory and layout design. In this block, typical architecture of sigma-delta modulatorwas analyzed, and then the architecture of sigma-delta modulator which fit the highresolution was analyzed and presented. An algorithm of auto calibration was presented.This arithmetic is concerned in the calibrations which automatically execute withouthuman interposition and could clear the error of gain and offset combined with the filterwork. A method of programmed gain control was presented and analyzed. The methodcould program the gain of sample and hold circuit combined with logic circuit.The dissertation is concerned about the implementation of the device of24-bitsigma-delta convertor. The design is based on the0.6um BiCMOS process. Main clockfrequency of the device is10MHz. The resolution of the device is24bits. When oversampled rate is changed, the effective resolution bits are changed and the first notch ofthis digital filter can be programmed via the on-chip control register allowingadjustment of the filter cutoff and settling time. The device has auto calibration functionwhich could calibrate the gain error and offset error on time. The device has innerreference which could output low noise2.5V dc voltage. The24bits convertor is hard to test because the high resolution. The testing environment is too strictly to implement.We complete the test via the cooperation with research center.By the analysis of this topic, the device was taped out and tested. At end thedesign became to the realized ic. The dissertation verified the theoretical analysis.
Keywords/Search Tags:Sigma-Delta, modulator, auto calibration, programmable gain
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