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The Implementation Technology Of Hardware Clock And PTP Multicast For Synchronization Of Packet Transport Network

Posted on:2014-02-25Degree:MasterType:Thesis
Country:ChinaCandidate:M M ZhangFull Text:PDF
GTID:2248330395484208Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the development of all-IP in transport network as well as the growing development of3G/LTE, synchronization technology of packet transport network becomes one of the hot sports incurrent research and application. In the process of evolution from circuit-switched technology topacket-switched technology of transport network, high quality performance of timing andsynchronization must be provided by packet transport network, in order for it to be compatible withtraditional TDM services and able to bear3G/LTE wireless service. IEEE1588protocol is widelyused in the packet transport network that requires timing and synchronization. The realization ofIEEE1588system and its clock module with high accuracy is one of the important researchsubjects for synchronization and timing technology of packet transport network.This paper analyzes factors that influence the synchronization accuracy in IEEE1588system,as well as the key implementation technology of IEEE1588protocol. On this basis, module withPTP multicast communication function and prototype system of hardware clock is designed andimplemented. The prototype system is realized in embedded FPGA system, which can function asan adjustable hardware clock. Hardware platform of the embedded FPGA contains soft core ofconfigurable processor called MicroBlaze, and soft core of related peripherals such as networkinterface and PTP clock. As for the embedded operating system PetaLinux, driver in the kernel isdesigned to control multicast, so that the MAC soft core can be driven to work in promiscuousmode and able to support multicast.Finally, the functionality of the prototype system is testified. In order to verify the realizationof PTP multicast, Wireshark is used to observe the process of communication between the prototypesystem and the ptpd simulator, packets captured show that the module for multicast functions well.As for the Hardware clock, ChipScope is used to watch signals in time register on MII, and statechange of time register is analyzed as well as the synchronization results. The test shows that thehardware clock designed can be used in PTP time synchronization control.
Keywords/Search Tags:IEEE1588, FPGA, Hardware Clock, PTP Multicast, Prototype system
PDF Full Text Request
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