Design Of High-speed Broadband Digital Receiving And Recovery System

A high-speed broadband signal receiving and recovery system, which is a testingcomponent of ISAR, is proposed. Based on data acquisition, data pre-processing, signalrecovery techniques and data transmission technology, The system achieves a systemtesting, and has an important engineering value.Paper analyzes the current development of the high speed receiver system, pointingout the key factor restricting the development of the system, then proposes the proposalfor high-speed broadband signal receiving system based on high-speedserializer/deserializer, Field Programmable Gate Array(FPGA) and Quadrature DigitalUpConverter(QDUC), Taking optical fiber as transmission medium, high-performancefield programmable gate array as the core, the QDUC as a platform, the systemcompletes high-speed digital receiving, the baseband signal pre-processing and thebaseband signal conversion. After determining the program, the hardware design iscompleted, which consists of optical transmit and receive circuits, clock processingcircuit, the FPGA peripherals circuit and QDUC circuit, so is the PCB board, VerilogHDL is written to achieve data acquisition, decoding, CRC check and so on.Results of experiments verify that the system has merits of good real-timeperformance, good stability and strong anti-jamming ability, and also has the feasibilityand effectiveness.