Wafer Level Packaging Board Level Drop Reliability Research

The integrated circuit package is very important in the semiconductor industry chain.With the rapid development of IC technology,1C packaging has become the bottleneck restricting the performance of integrated circuits. Wafer Level Package (Wafer Level Package WLP) develops rapidlyin recent years,its costs was cut down substantially because thepackaging, aging, testing, and finally cuttingwere processing on the wafer level. WLP has many advantages such as small package size, high stability of data transmission, good heat dissipation and etc. Though WLP significantly improvesIC device performance, it has someshortcomings:too large ball pitch, too less I/O pins, relatively poor reliability. WLP is mainly used in portable electronic productsbecause of these shortcomings. Because of the special working environment of portable electronic products, the reliability under temperature cycling and drop test is becoming more and more important.The reliability of different WLP devices were studied by mechanical and thermal reliability test to help understand the WLP failure mechanism and to establish the reliability database.In this study, WLP devices were assembled to PCB (Printed Circuit Board) substrates, and three types of reliability tests:board-level drop test, temperature cycling, thermal shock were processed. Failure samples were studied by failure analysis such as X-ray imaging, Cross-Section and SEM (Scanning Electron Microscope);mechanisms of the WLP failure and reliability solution were discussed.The drop test condition was set to1500Gpeak-acceleration,0.5ms pulse-durationaccording to the JEDEC board level drop test standard.High-speed data acquisition equipment was used to monitor of the daisy chain resistance andthe failure events;Weibull statistical analysis was used to calculatethe failure life of different WLP samples;the relationship of ball-pitch, ball-size, and PCBpad-finishwith reliability and failure mechanism was studied. It is found that the connection between the chip and PCB is the weak link in the entire WLP system; the stress and strain during the drop-test can be reduced by using underfill, and the WLP solder joint reliability is improvedgreatly.The temperature range of temperature cycle and thermal shock was-55℃to-125℃according to JEDEC standard. Reliability of the WLP samples in these two experimental conditions was studied by Weibull statistical analysis. Failure mechanism and failure life were studied in order to compare the different between three failure modes. The results showed that temperature cycling samples had higher failure life; both two tests had three the same failure modes;the cracks of the silicon and Al wiring fracture happened more in thermal shock test because its temperature changes much more quickly.By ReferencingFinite Element Analysis(FEA) of the relevant literature, the relationship between the failure mechanism and two temperature tests was further understood.