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Wafer Level Chip Size Package Thermal - Mechanical Reliability Research

Posted on:2013-01-04Degree:MasterType:Thesis
Country:ChinaCandidate:R H HongFull Text:PDF
GTID:2248330395950649Subject:Materials Physics and Chemistry
Abstract/Summary:PDF Full Text Request
With the miniaturization and high density improving of electronic packaging, wafer level chip scale package (WLCSP) has been developed in the past few years and become one of the most advanced packaging concepts.RDL and Bumping technology have been used in WLCSP, which greatly decrease packaging volume. It fulfills the demand for small, lightweight and portable handheld electronic devices. WLCSP is typically used without underfill, so when WLCSP were mounted on the board, the coefficient thermal expansion (CTE) mismatch between silicon and printed board (PCB) causes a reliability issue. The solder joints will deform plastically and rise to crack generation and grow, which leads to the complete failure of the solder joints. Thus, the solder joint thermal-mechanical reliability of WLCSP is a prime concern in its application. In the thesis, we combined finite element method (FEM) with reliability experiments to analyze the thermal-mechanical reliability of WLCSP. The major contents include:To begin with, the effect of micro-solder joint design parameters on its thermal-mechanical reliability was analyzed. The design parameters which have significant effect on thermal stress of solder joint and under bump metal (UBM) were obtained by2D finite element simulation. Furthermore, full-factorial experiment and analysis of variance (ANOVA) were used to exhibit quantitative sensitivity information of design parameters.Besides, thermal stress and strain distribution of WLCSP was analyzed when it was under thermal cycle loading by3D finite element analysis (FEA).The3D submodel simulation was carried out to show the effect of solder joint material type, shape and radius on its thermal-mechanical reliability. The elastic-plastic-creep constitutive model was used and effect of temperature profile on its reliability was analyzed.Furthermore, thermal shock and thermal cycle experiment were carried out when WLCSP were assembled on PCB board, and reliability result such as characteristic life was got. Failure mechanism was discussed by failure analysis method such as X-ray and SEM. Finally, experiment and simulation result were combined to get fatigue life model which build up relationshipbetween thermal shock and thermal cycle.The results revealed that (1) solder joint radius is critical factor for thermal stress of solder joint,passivation diameter and solder joint radius are critical factors for thermal stress of UBM.(2) With the increased of distance between solder joint and center location, the maximum thermal stress and strain increased. The corner solder joint is the critical one. Solder joint material type and shape had significant influence on thermal stress of solder joint and UBM, respectively. The maximum stress of critical solder joint was decreased with the increase of solder joint radius.(3)There are two failure models of solder jointsin thermal-mechanical reliability test. Firstly,"V shape" crack generated and grew between solder joint and UBM. Secondly,"reciprocal V shape" crack generated and grew between solder joint and copper pad. The relationship between inelastic strain energy density and reciprocal of ramp rate can be fitted as exponential curve. When dell time and temperature range dwell was fixed, the fatigue life of critical solder joint was the function of ramp rate. The relationship between thermal shock and thermal cycle can be built up by this function.
Keywords/Search Tags:Wafer level chip scale package, thermal-mechanical reliability, statisticalanalysis, failure analysis, fatigue failure model
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