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Reliability Study Of CSP Board-Level Package Under Drop Impact Load

Posted on:2009-12-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:B ZhangFull Text:PDF
GTID:1118360305956278Subject:Mechanical and electrical engineering
Abstract/Summary:PDF Full Text Request
The development of the high integration level of semiconductor technology and miniaturization and multi-functionalities of electronic products impels the development of electronic package technology. The technology of electronic package trends to the high density, which leads the micro-interconnections of electronic components to grid array, multi-pins, fine pitch and small size. The reliability of the small solder interconnections is one of the bottle necks of the extensive use of the high density electronic components. The anti-shock performance of solder micro-interconnections is an important reliability index. Due to the consideration of environmental protection, the substitution of lead-containing solder with lead-free solder has become an inevitable trend in the 21st century. So the reliability study of lead-free solder interconnections, which has its practical significance, becomes a vital issue in electronic package industry.Taking the Chip Scale Package (CSP) as a subject investigated, this dissertation performs the modal analysis, dynamic response analysis of CSP board-level package, fracture parameters analysis of CSP solder interconnections and failure mechanism of solder interconnection under drop impact load by the means of combining the theoretical analysis, Finite Element (FE) simulation and experimental analysis. This dissertation also performs the effect of thermal cycling load on drop lifetime and the failure mechanism of solder interconnections under sequential thermal cycling and drop impact load.Based on the vibration theory of thin plate, the beam function combination method is adopted to calculate the modal shapes and the corresponding natural frequencies of board-level package with the two opposed edges free and another two opposed edges fixed. The 3-D finite element model is built for the modal analysis of board-level package. The TV-Holography or electronic speckle interferometry (ESPI) method is adopted in the modal test of board-level package. The comparison among the natural frequencies by theoretical method, FE method and experimental test is carried out. The modal assurance criterion (MAC) values of the first nine order modal shapes by theoretical method and FE method are obtained. The results indicate that the theoretical results are right, and the FE model and experimental method are feasible.The reliability of solder interconnections is dependable on the dynamic response of the board-level package. The mode function combination method is adopted to study the dynamic responses in time domain of board-level package under drop impact load. The theoretical dynamic responses are compared with the results from FE simulation and experimental test. The dynamic responses in time domain are translated by Fast Fourier Transform algorithm (FFT) to investigate the dynamic response in frequency domain. The board-level package is simplified as a pure bending beam, and the relationship between the dynamic strain response and the bending moment is deduced. The stress of solder interconnections due to the bending of board-level package is calculated using the FE method according to the bending moment. The cross-section test and dye&pry test are adopted to study the failure mechanism of CSP lead-free solder interconnection.The size of solder interconnection is so small that the available experimental test method is not feasible to measure the fracture parameters. Based on the dynamic responses of board-level package, the fracture parameters of solder interconnections are investigated by the means of combining the theory of interfacial fracture mechanics and the FE simulation. The feasibility analysis of the COD-based linear extrapolation method to calculate the interfacial crack parameters of solder interconnection is investigated. This dissertation also studies the effect of the dynamic load, the pre-crack length and the pre-crack location on the fracture parameters of the solder interconnection. The results show that the method is feasible.The sequential thermal cycling (TC) and drop impact test is more reasonable to evaluate the reliability of lead-free solder interconnections compared with single TC test or drop impact test. The drop lifetime model is built for the as-reflowed and thermally cycled samples using the statistics method. The cross-section test and dye&pry test are adopted to study the failure mechanism and failure mode of solder interconnection under sequential TC and drop impact load. The failure mechanism of solder interconnections under sequential TC and drop impact test is different from that under single drop impact test.
Keywords/Search Tags:electronic package, reliability, drop impact, dynamic response analysis, interfacial fracture, failure mechanism
PDF Full Text Request
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