Evolvable Hardware Technology Research

Evolvable Hardware also called EHW or E-hard can change its structure to adaptthe survival environment like the living things according to the change ofcircumstances. It has a self-organizing, adaptive, self-repairing function. Since in1992the conception of evolvable hardware was officially proposed, it has beenconcerning widely more than ten years, and this concern is increasing.Evolvable hardware combines evolvable algorithm with electronics effectively. Itexpands the realization of new ways on hardware design automation, adaptivehardware and self-repairing. Thus it has many applications in aviation and aerospace.Although at home and abroad there were the long-term studies on evolvable hardware,and it has been used on many practical areas such as image processing, circuit design,machine learning, its real-time bottleneck is still the current existing problem which isthe researching emphases of various research institutions. In order to apply evolvablehardware technology in more real-world situation, at the same time realize thereal-time self-repairing function of the hardware, it must be considered to reduce theconsumption of time and space when we execute the hardware evolution.Evolvable hardware technology mainly includes two parts: evolvable algorithmand evolvable hardware platform. In this paper, in order to improve the real-time ofevolvable hardware, we begin from researching the running speed of evolvablealgorithms, then research and analyze the existing evolvable algorithms, particularlygenetic algorithm which obtains the wide application. This paper presents a kind ofnew algorithm. It is based on the original compact genetic algorithm, however itsconvergent speed is faster and it is more suitable for hardware implementation. It iscalled the compact genetic algorithm with tendency. Finally off-line evolvableplatform is designed by using compact genetic algorithm with tendency which is thehard core of the platform. After that we use the designed platform to evolve somefamiliar circuits, and through analyzing the experimental results, the validity andsuperiority of core algorithm is proved.