Research On S-band DDS-driven PLL Wideband Frequence Synthesizer

The information technology has witnessed a rapid development since thetwentieth century. Wireless communication technology has been developing rapidly,and it has a wide range of applications in the relay communications, satellitecommunications, radar, electronic warfare and guided weapons. With the status ofthe wireless communication system improved in the civil and military applications,frequency source are required to have higher resolution, faster frequency switchingspeed and lower and cleaner spectral purity. This task is to achieve an S-bandwideband frequency synthesizer with low phase noise and low spurious.This thesis firstly described the concept and reviewed the developed course ofthe frequency synthesizer technology and introduced the current development ofthe frequency synthesizer technology at home and abroad. Then it introduced theconcept, structure and operating principle of DDS and PLL, meanwhile analysedthe main source of phase noise and spurious. And then according to requirements ofthe subject, we determined the design plan and several core chips,demonstratedfeasibility, and described in detail the design process of the multiplier chain circuit,the DDS circuit and PLL circuit.PCB rules and electromagnetic compatibilitydesign were introduced, too. Finally, the main performance indicators of thefrequency synthesizer were measured.The design difficulties of this subject is that the output frequency band is wideand the performance requirements of phase noise and spurious is high, meanwhilethere are specific requirements on the operating temperature and the size of thesystem. These difficulties are solved by the following steps:Firstly, a circuitcomposite structure of DDS drive PLL was used to reduce the spurious. Secondly,the packaged diodes were used to achieve the fifth harmonic, so that the circuit wassimple and the circuit area was reduced. Thirdly, the high-performance DDS chipAD9912was used to help improve the spectral purity of the signal. Lastly, the formof MCU control DDS and PLL was selected to help widen the band of the outputfrequency.The final measured results showed that, within the frequency range of 2300MHz~2960MHz, the frequency step was1MHz, the phase noise was betterthan-95dBc/Hz@1KHz and-102dBc/Hz@10KHz, the spurious was better than-60dBc, and the hopping time was less than20μs. They all achieved therequirements of the performance indicators of the subject.