The Research Of PSP-dependent HCI Reliability Model For40nm MOS

As VLSI technology enters the nanoscale, MOSFET channel parameters such as length, width, junction depth and oxide thickness decreasing constantly, but the reducing speed of supply voltage is less than the speed of the MOSFET size, and then the device hot carrier injection (HCI) effects become increasingly severe.In recent years, researchers put forward a new circuit design concept design for reliability, that is to consider the impact of reliability on circuit performance in the circuit design, by the use of reliability models which could make accurate characterization of device performance degradation trends to optimize design and reduce design costs.On the basis of the MOSFET reliability simulation solution, a new reliability model based on the SPICE PSP model have been proposed. This study designed and prepared40nmLL process1.1V nMOSFETs, Agilent4156c test system the Cascade S300probe and MBP, which is a parameter extraction software have been used for data acquisition and simulation of device reliability. Finally, a scalable PSP reliability model has been achieved.By analyzing the physical meaning of the parameters of the MOSRA model and compared with test data, four related parameters of the HCI effect have been selected, in which HN, LTHCIO associated to the threshold voltage and HK, LUHCIO associated to the mobility. And the fitting of the time and size of the modulation factor, then the formula of the new model form of a subcircuit and call parameters to MOSRA model card and then embedded in the form of the model card to initial the SPICE PSP model. HSPICE simulation shows that it were in good agreement with HCI accelerated test data. The study model of MOSFET devices of all sizes and test data error corresponds to the threshold voltage Vth is less than3%, while corresponding Idlin and Idsat less than5%. This model can be used to predict device time-domain properties and guidance the design of VLSI devices and circuits.This paper is funded by the sub-project of the national Ministry of science and tech-nology major projects(core high based):45nm complete sets of product process and IP-1(2009ZX02023-2-1).