Design Of Analog Integrated Circuit Testing System And Network

IC test has become an important supporting technology of the integrated circuitindustry. IC wafer test is not only an important measure of IC test but also an importantmeans to ensure the IC’s reliability. In this dissertation, the IC test system is animportant equipment of this process.The dissertation first introduces the history of the development of integrated circuittest system. Then the composition and classification of Automatic Testing Equipment(ATE) are introduced. Finally, proposed the IC test system architecture of this project.In this dissertation the IC test system includes testing hardware, transit system andnetwork part. Testing hardware consists of signal acquisition, processing and occurredpart based on FPGA including Time Measurement Unit (AWG), Arbitrary WaveformGenerator (AWG), DIG, Precision Measurement Unit (PMU), Digital Volt Meter(DVM), and Root Mean square (RMS). Function module through the PCI bus tocommunicate with the host computer to receive and send data. Internal datatransmission is based on custom bus.The software of IC test system which including transit program and server programis based on Windows system’s.NET Framework platform. The programs are able toconvert the communication between the different Tester and Prober’s interfaces(interfaces including TTL, GPIB, RS232) and process the communication data togenerate test files. The programs also can real-time display, choosed die retest, Multi-dietest, upload the test files to the server and generate a unified statistical documents andreports.Finally, verification through simulation software testing and production testing testmachine transit program are designed to meet the design requirements of the appeal andcould be applied to manufacturers testing.