ASIC Implementation Of RSA Encryption Algorithm

The RSA encryption algorithm is the most widely used public-key cryptographer(PKC) of the world. And the RSA encryption algorithm has been used as an important means to ensure information security data encryption and digital signature. Solving the product of two large numbers in the calculation is very easy and to decompose the product of two large prime numbers to find its factors is recognized as the world mathematical problem. The RSA algorithm is a kind of encryption algorithm based of the decomposition of large numbers factor. Sine1977the RSA encryption algorithm was developed by Ron.Rivest Adi.Shamirh and Len.Adleman,it was extensive researched and achieved fruitful results. The results of these studies focused on Montgomery Algorithm improvements. This article first briefly describes the development and application of public-key encryption algorithm and the RSA encryption algorithm, given the structure of the modular multiplication algorithm suitable for hardware implementation.The key to modern integrated circuit design has two aspects. First, performance of the chip, and second is design cycle. Due to the complexity and diversity of the RSA encryption algorithm implementation, whick greatly limits the operation speed of the RSA algorithm and chip design cycle.In order to improve the speed of operation of the RSA encryption algorithm, the article first describes the RSA encryption algorithm frequently used in the course several modular multiplication algorithm, Montgomery Modular Multiplication algorithm and improved algorithm, Chinese Remainder theorem, then analyze their disadvantages and advantages, and the possibility of hardware implementation. Finaly,decide to use the Montgomery improved algorithm, so that greatly improved the overall speed of operation of the RSA core computing speed and the RSA encryption algorithm chip.To shorten the design cycle, this article uses fast processes based on system-level algorithm. From idea generation to completed chip, R&D cycle, the shorter the better. In the RSA algorithm for system-level design phase, implementation of the RSA algorithm first made effective assessment and optimization of RTL-level design for the future to save a lot of time. The main work of this paper:Firstly, understanding of the RSA encryption algorithm C code, then translate it into Verilog code. Secondly, Use tools of Synopsys company to verify and comprehensive the Verilog code. Finally, analysis results.