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Design And Implementation Of Speech Denoising FPGA System Based On Lifting Wavelet Algorithm

Posted on:2013-04-22Degree:MasterType:Thesis
Country:ChinaCandidate:T ZhangFull Text:PDF
GTID:2248330371988849Subject:Circuits and Systems
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In recent years, Speech has become one of the most popular and important means of communication, but it is vulnerable to noise pollution. Noise often makes poor audio quality and affects the recognition, synthesis, coding and decoding process of voice, which ultimately impacts people’s communication. So the speech denoising has come into being, which is not only the core element in the speech enhancement research field but also the important aspect of speech recognition and the code preprocessing. Because of its complete theory and wide application, the wavelet denoising has become a hot subject and an effective method in the study of signal processing. At present, with the quick development of various hardware (such as DSP, the FPGA, the ARM, etc.) and the combination of denoising algorithms, the denoising system will look forward to practical development.Basing on the previous reseaches of classical denoising ways, these classical denoising systems are first implemented on matlab by testing their denoising abilities with the Euclidian Distance Discriminant, Correlation Coefficient and RMS. And then, their elapsed time should be take into account to get a appropriate method for hardware. After that, various wavelet theories are used for denoising. In this thesis, a thorough study was conducted to find the advantages of wavelet denoising system, especially the lifting wavelet theory. Also, bior4.4lifting wavelet was designed here, which was combined with FPGA to improve the lifting wavelet theory on the DE2.The results shows that this paper’s design is possible by using as little chip resouses as possible but obtaining a faster possessing rapid than ever. Moreover, this paper’s design is better than the common DSP processor. All the functional modules of the system are implemented on FPGA and the hardware system has passed the debugging test. The results show the feasibility and accuracy of the experiment design. With the achievement of using less chip resources and obtaining faster possessing speed, the design is better than the common DSP processor.This paper mainly includes the following aspects:(1) the characteristics of speech and noise, auditory perception characteristics the basic theory of wavelet denoising and its application in denosing field.(2) spectral subtraction, and all kinds of the improved spectral subtraction speech denoising system on matlab.(3) classic winner filtering, adaptive filtering method to the speech denoising on matlab.(4) wavelet and lifting wavelet algorithm’s application in speech denoising system.Focusing on a variety of wavelet speech denoising with different threshold, different layers, and different strategies, mainly researching on the wavelat algorithm, this paper finally gives a good and effective denoising method for hardware by contract with the spectral subtraction, filtering method.(5) double lifting wavelet algorithm denoising system in the hardware-based design and and implementation.The hardware experiment was presented in three steps. Firstly, functional modules are programmed and simulated one by one. Secondly, they are all integrated into a hardware system. Lastly, the whole hardware system is tested. The results of which are compared with the results of the lifting wavelet theory on matlab and the traditional biorthogonal wavelet denoising on the DE2.
Keywords/Search Tags:FPGA, Lifting Wavelet Transform, Denoising Threshold, VerilogHDL, Speech
PDF Full Text Request
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