The Application Of Lifting Wavelet Transform Based On FPGA

Due to the well time domain and frequency domain of local features, wavelet transform has been widely used in image de-noising, image compression and other signal processing. Since the lifting wavelet transform is suitable for hardware implementation, it has been widely used in engineering field. In 2007, Ding et al proposed a separable adaptive directional lifting wavelet transform (ADL). ADL is concerned by many scholars and is considered to play an important role in the next generation of image compression. Therefore, the research on lifting wavelet transform (including ADL) is very important in engineering field. In this paper, three aspects of research work are done as follows.Firstly, the lifting wavelet transform in image denoising is studied. The 5/3 lifting wavelet transform soft-threshold de-noising algorithm is applied to the parallel real-time image processing system. Since MIMD (Multiple Instruction Multiple Data) array ASIP (Application Specific Instruction set Processor) system is designed to process lots of sub-blocks of large image in parallel, large amounts of CCD image data can be processed in real time. We extract the specific instruction set of the algorithm and design the RISC architecture of ASIP. The soft-threshold de-noising algorithm is realized on the ASIP platform using the assemble language.Secondly, due to the advantages of ADL in image de-noising and image compression, we propose efficient four-stage pipeline architecture suitable for FPGA implementation after the sudy of the algorithm parallelism. The work is the foundation of ADL's engineering application.Thirdly, the article describes the hardware platform of real-time image processing system. This system includes the CCD signal source sub-system, core processing board system, and data buffer & data distribution sub-system. The design of the data buffer & data distribution sub-system is introduced in detail.