Simulation And Verification Research Based On MT-6000 System Level

In the modern society, the requirements for communication chips are evenstricter because it asks for not only high density of integration, high performanceprice ratio, small cubage, light weight, but also high speed, long-distance,multi-node, high redundancy and simple peripheral circuits. MT-6000 which has niceperformance, nice peripheral circuits and high desity of integration enjoys apromising market.This thesis analyzes the background, meaning and using value of MT-6000,makes a systematical study on discrete simulation theory, single stuck-at fault theoryand built-in self-test theory, and innovatively puts forward a combination of discretesimulation theory and hierarchy modeling theory from top to bottom to the modelbus chips. Using one MT-6000 chip to model the whole MT-6000 system gives anexample in simulating large scale serial bus chip system. The specific content of thisthesis is as following:1) Analyzes the features of present serial bus chips, points out theirshortcomings, and explains why MT-6000 can be used in sophisticated andlarge-scale industry like communication; 2) Makes a systematical study on discretesimulation theory and built-in self-test theory which lay a foundation for themodeling and simulation of MT-6000; 3) Puts forward a combination of discretesimulation theory and hierarchy modeling theory, and proposes a method to modelbus chips like MT-6000. Finishes MT-6000 Built-in Self-test by single stuck-at faulttheory with four concise test codes; 4) Analyzes the functions of MT-6000 chip indetail, and presents the simulation flow chart; 5) Gives the result of simulating thechip.