H.264Motion Estimation Algorithm Optimization And Realization Based On FPGA

H.264is the video coding standard jointly developed by ITU-T Video Coding Experts Group(VCEG) and ISO/IEC Moving Picture Experts Group (MPEG). There are many advantages in H.264such as high compression ratio, high image quality, excellent network compatibility and so on. It isapplied in more and more widespread field such as digital television broadcast, real-time videocommunication, network video streaming transmission and other various aspects. However, thecomputational complexity of H.264is much higher than the previous standard, and it is very difficultto meet the requirement for real-time applications by just using the software. In order to reduce thecoding time and improve coding efficiency of the system, it is necessary for the optimization oftime-consuming and resource-intensive motion estimation module to use software, and thenimplements motion estimation module by hardware.Based on the ideas above, the optimization and realization of H.264motion estimation algorithmbased on FPGA is researched in this paper. The main research work is as follows:(1) First, the characteristics of H.264video coding standard, encoding and decoding structure andthe major coding techniques are discussed in this paper. Motion estimation is the core of the H.264encoding standard, the computation of that accounts for about80%. Second, the method of H.264Block-Matching Motion Estimation which needed to be optimized is described, then several existingclassical Block-Matching Motion Estimation algorithms are introduce and their strengths andweaknesses are analysis respectively.(2) In order to reduce the complexity of motion estimation and improve the efficiency of the videoencoder, a motion estimation search algorithm based on motion intensity (MEMI) is proposed. Motionintensity reflects the intensity of motion between the adjacent frames. By defining the concept ofmotion intensity, the movement of the next frame is predicted based on the measured intensityinformation of the current frame, and different motion search algorithm is selected. If the motionintensity of the current frame is greater than the threshold, the unsymmetrical-crossmulti-hexagon-grid search (UMHexagonS) algorithm is chosen for searching, otherwise the improvedhexagon algorithm is chosen. Simulation results show that the coding efficiency is improvedsignificantly, while the image quality and compression performance change little. In addition, thethreshold of motion intensity in the algorithm is adjustable, thus the demands of different encodingcan be met by changing the threshold.(3) MEMI algorithm is designed using Handel-C and implemented on FPGA. The target FPGA was the Xilinx’s Virtex-E XCV2000E on the experimental board. The motion estimation module wasdownloaded to the experimental board to test and verify the feasibility and correctness of the design.The experimental results show that motion estimation time of MEMI using FPGA was reduced greatly,and encoding frame rate can achieve15.37f/s (frames/seconds).