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One Kind Based On The SHARC Data Recording Equipment Design And Implementation

Posted on:2012-10-08Degree:MasterType:Thesis
Country:ChinaCandidate:X X ZhouFull Text:PDF
GTID:2218330371959837Subject:Electronic and communications
Abstract/Summary:PDF Full Text Request
Nowadays, an obvious character of signal processing is a large number of adoptions of digital signal processing (DSP) technology. In the modern digital signal processing technology, due to contain the increase processing speed and the great potential of solve large scale problems in parallel processing, it has already become the key growth in this field. At the same time, the record and restore of the real time signal has becoming a new topic. In addition, we could say that modern data storage is the important function of the modern signal processing equipment, especially for the primary signal record. On the one hand, we could restore the environment situation and the signal through playback record the data. On the other hand, we can use the original signal to study new processing method. This article introduces a king of SHARC Series based on DSP high speed interface card and provided the structure and software design process of it.The purpose of this design is to provide high-speed array data channels for a SHARC Series processing machine, which could make it possible to go on real time data transmission along with analog signal acquisition module. This design adopts the current international advanced parallel floating-point DSP device ADSP 21062 chip, designed and realized a data decoding transmission system based on a VEM bus. This system provides high-speed data transmission channel between SHARC Series parallel-array-processors and analog-signal acquisition module. This design provides 6 link mouths for data transmission, and has many kinds of connections to SHARC Series array machine which can suits different arithmetic acquirements. The system has the ability to the analog signal acquisition module to provide the data pretreatment and amount of operation. Considering different algorithm needs different signal processing time, in order to not lost the test data, this system has ability to storage a certain amount of data.In this paper, the main research contents include:1.Data collection recording system development; 2.The CPLD device and use the block diagram design method to complete each part of the logical interface design for data acquisition and control; 3.The commissioning of SHARC Series chip. Both includes the SHARC Series guidance programming and through the link mouth to go on data transmission and reading and writing operation.
Keywords/Search Tags:SHARC Series, CPLD, SCSI, data record
PDF Full Text Request
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