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Design And FPGA Implementation Of The Core Block Circuit For Digital Image Processing System Based On Typical Edge Detection Algorithm

Posted on:2013-02-25Degree:MasterType:Thesis
Country:ChinaCandidate:K ChenFull Text:PDF
GTID:2218330371959382Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Image edge extraction is one of the basic approaches of digital image processing. On basis of previous related studies, through comparison of the variety of gradient-based schemes, a typical edge detection algorithm is chosen to be our object of research, in this paper. We elaborately analyze the principle of the algorithm and digital circuit implementations (FPGA), and achieve its function with hardware description language (Verilog HDL). The core block circuit of edge detection algorithm is designed based on FPGA development platform. FPGA-based designing circuit design will make designers to focus on specific functions of the circuit design and benefit the realization of further improved algorithm and circuit performance.In this paper, implementation of the digital image processing system (the edge detection algorithm verification system), is mainly based on Altera's Cyclone II FPGA development platform, achieved by Matlab, QuartusII, ModelSim and other hardware and software combination. In the paper, we will analyze the system structure, design and implement each function block (controller, edge detection block, the data memory), and verify the algorithm. The system is mainly divided into two parts. The first one is peripheral, which includes preprocessing raw image, transmitting/receiving image data, displaying image as the results of edge detection. The second is FPGA development platform, which includes implementation of edge detection algorithm (i.e. core block circuit for the edge detection algorithm), sending and receiving data device (UART), and controlling unit to enable reading and writing data, and controlling of UART to transmit or receive data. Data are transferred through the serial interfaces between the peripheral and the FPGA development platform.Compared to the traditional image edge detection systems in which software or other processors are used, UART transmission is made use of in this system, which determines the system to be non-real-time. However, the effect of edge detection algorithm can be verified conveniently, and the data are observed better through human-computer interaction, which would help us to correct the design to achieve exact effect and to further improve the algorithm to achieve better effect, these are the advantages of system.
Keywords/Search Tags:FPGA, Edge Detection, Verification Platform
PDF Full Text Request
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