Wideband Digital If Receiver Design

The main work of this paper is to design wideband digital intermediate frequency(IF) receiver. On the basic system of digital IF receiver, this paper discussed three digital IF receiver solutions, analyzed the advantages and disadvantages of the three solutions. After comparing the key indicators, the AD6655+FPGA digital IF receiver design was selected,the design could deal with a IF input signal of 200MHz,30MHz bandwidth, the system is smaller and the cost is lower.The hardware circuits of the AD6655 and FPGA respectively has been designed, the schematics and the overall layout were given. Machining,welding and debugging of hardware were completed.Based on FPGA,the control of AD6655 and digital signal processing was done.In the design of controlling the AD6655,sytem-on-a-chip(the Nios soft-core) was built, C programming of the system was completed. VHDL Programs and simulations of digital signal processing(including calculating signal amplitude, phase, frequency) were also completed in QUARTUS.After completing the hardware and software designing, the receiver system was set up, and test was done,the test results were analyzed.