The Research Of ROIC Design For The Low Dimensional Photoelectric Sensors

The research of readout integrated circuit (ROIC) is the important union of sensing technology and the microelectronic technology. The photoelectric sensor has a wide range of applications in the military, medical and so on, and the photoelectric sensor readout integrated circuit is the core processing unit of taking the sensor signal to electrical signal; therefore it becomes the research hot spot. This article in view of a low dimensional photoelectric sensor's component characteristic carries out the CMOS readout integrated circuit match design research, and builds the foundation for its practical application.A practical equivalent circuit model of the low dimensional photoelectric sensor is proposed in this article. This model provides input signal for ROIC simulation, it describes the relation between the bias voltage and current, also the bias voltage and capacitance of the low dimensional photoelectric sensor.According to the equivalent circuit model, an optimal readout integrated circuit is designed for the low dimensional photoelectric sensor. The schematic diagram design and the simulation of each circuit unit such as readout unit, CDS, shift register unit, are carried out with the CMOS standard process. This article mainly aimed at 2×8 the array photoelectric sensor to carry on the match readout circuit integration design, and the 2×8 array photoelectric sensor readout integrated circuit taped out by CMOS 0.6μm the 2P2M standard process. The packaged chip is tested detailedly and the experimental result is also analyzed. According to the experimental result, the design improvement and the optimization are done, and the design and the simulation of the big array photoelectric sensor readout integrated circuit are carried out.Based on the light memory characteristic of the low dimensional photoelectric sensor, a practical dump structure of CTIA readout integrated circuit is proposed. This dump structure has the advantage of realize simply, test convenience and so on, also has the strong usability and the feasibility. Furthermore, a practical dump structure of SI readout integrated circuit is proposed.