The Research And Design Of Radio Frequency Monolithic Voltage Controlled Oscillator In 0.18μm CMOS Technology

The quick development of wireless communications market has driven the wireless transceiver development and research at low-cost, low-power CMOS technology recently. With the rapid advancement of CMOS process and technology, the on-chip implementation of most radio frequency cell circuits, such as power amplifier (PA), low noise amplifier (LNA), mixer and oscillator has become true. Especially, the realization of high quality on-chip passive elements such as inductors and varactors make on-chip implementation of LC voltage-controlled oscillator (VCO) possible. Designing an on-chip VCO to fulfill the noise and tuning range requirements with low power consumption is still a hot and hard subject in the area of RF IC.In view of the above problem,the theory and design methods of LC VCO are studied in this thesis. With a view to domestic and overseas references that are related, a full-integrated VCO is designed under the conditions of low power consumption, low phase noise and large tuning range. Major contents and results of study are abstracted as follows. 1. The fundamental theory and important parameters of VCO are studied in this thesis. Two analyzing methods respectively using feedback theory and energy compensation theory are discussed. Meanwhile, several different circuit structures of LC VCO are studied.2. As the most significant component,the characteristics of LC TANK,as well as the on-chip implementation of inductor and varactor are discussed. Especially, the structure characteristics, modeling and simulaton methods of on-chip planar spiral inductor and the performance of different varactors are discussed.3. The basic mechanism of phase noise is studied, as well as the phase noise models of VCO such as linear time-invariance (LTI) and linear phase time varying (LPTV). Some technologies used to reduce the phase noise are also introduced.4. The design and realization of two LC VCOs with different structures for UHF RFID system, using SMIC 0.18μm CMOS technology, are discussed. The circuit structures of the LC VCOs and the selecting of each element are also discussed in particular. And then through the SpectreRF simulation results, the performances of each VCO are compared and appropriate measures are took to optimize the phase noise of one of them, with its layout designed too. This design has a wonderful performance in phase noise and low power consumption, with a tuning range of 858.2~986.6MHz. At the frequency of 915MHz, the VCO's phase noise is -109.6dBc/Hz at 100 kHz offset from the carrier and -132dBc/Hz at 1 MHz offset from the carrier. The core circuit only draws 6.2mA current from a 1.8V supply, fulfilling the system requirements.