Research On The Embedded Multi-core Architecture For An Facial Feature Detection

In recent years, as a hot research Gaze estimation's significance is realized by more and more people and it is also the primary research of our group. As part of gaze estimation, face detection is the focus of this study. According to research group found in this area, high efficiency and low energy consumption of embedded real-time facial feature detection system is meaning. This article uses the hardware and software co-design methods to design, and based on configurable and extensible processor (T * core) it deals with questions in this area.In this paper, it has abandoned the original detection algorithm based on skin color and a higher detection accuracy face detection algorithm which is based on haar-like features is used。Meanwhile,Optimizing the YCbCrCg color segmentation model which make calculation reduce to the 1 / 3 of original . A new storage is proposed which could reduce storage space of integral image and make the storage width down to 17bitand 25bits. A novel scan strategy is adopted to make the data accessing more regular and increase computing speed without increasing resource consumption register at the same time.According to the functional partitioning of the algorithm, this paper adopts a transmission trigger architecture which can be configured to achieve face detection, and 10 function units and the corresponding parallel program is designed for specific application features .The other modules are implemented in NIOSⅡor ASIC module. And a multi-core architecture based on SOPC platform was designed. The whole system will run at 100MHz with 640 * 480 image, and processing speed is 8fps which meeting the original design requirements.