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The Research Of Encryption Method Based On The Solid State Disk

Posted on:2012-12-08Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2218330362956506Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
With the solid-state disk (SSD) widely used in the high-end digital field, the security issue of the user data becomes a very important topic. Today, software encryption, Trusted Platform Module (TPM) chip, hardware encryption are mainly used for protecting user data. The software encryption depends on the host resources, and the implement of hardware encryption needs high cost. The implement that the crypto engine is implemented in the controller of SSD doesn't need an independent hardware. Besides, the encryption operation is transparent to users. So it is a safe and practical solution.Through analysis of the data stream of reading and writing of SSD and base on the location of the crypto engine in the SSD, the design of encryption SSD was proposed. Advanced Encryption Standard (AES) algorithm replacing Data Encryption Standard (DES) algorithm is widely used for protecting user data. But the implementation of high-speed AES encryption engine needs to consume a lot of hardware resources. A design of the AES crypto engine of a compromise between speed and area was proposed. By using pipelined technology, the high throughput was achieved, and through using the look-up table for the SubBytes and InvSubBytes the logic area was reduced. Besides, the number of Block RAMs used in the crypto engine was reduced by storing the Sbox and Invsbox into the same Block RAM. The security of crypto engine depends on the design of key system. According to the characteristic of reading and writing of hard disk, the key system with variety keys was proposed. The encryption data was transparent to the users.The key cracked difficulty was improved by using the sector level key and text key. The crypto engine was simulated by using the Xilinx ISE software, and was implemented in the Xilinx FPGA xc6slx45 - 3fgg484. 1.986Gbits/s throughput and 232.748MHz clock frequency are achieved using 785 slices. The result showed that AES crypto engine design was able to meet the read and write speed of Serial Advanced Technology Attachment (SATA) 1.0 interface and could be implemented in SSD.
Keywords/Search Tags:Solid state disk, Data encryption, Advanced Encryption Standard algorithm, Crypto engine, Key management
PDF Full Text Request
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