Design Of Signal Processing Board Based On Hf Radar

With the urgent requirements of radar application, the radar signal processing is now gaining a fast developing speed. In the HF-Radar area, many new signal processing methods and algorithms are invented and applied, and the traditonal radar signal processing machine cannot fully meet the present requirements of radar signal processing, so it is an urgent task to design a high-perfomance radar signal processing machine.The dissertation mainly describes the whole process of designing a common signal processing board. This signal processing board can be applied into radar signal processing such as the Pulse Compression, Clutter Elimination, MTD, CFAR and DOA Estimation. Based on the model of elastic and tight coupling in multi-DSP system, the overall frame of the board is carefully considered and designed. Considering that the radar signal processing machine may be upgraded in future, so it is decided to design a high-performance signal processing board with six TS201S DSP and one Virtex-6 FPGA. These six TS201S DSPs are designed using the model of elastic and tight coupling, which not only makes the sharing of hardware resoures much more convinient, but also makes the network topology realized easily, and this structure can promote the processing ability and flexibility. The board is flexible when dealing with signal processing tasks, and the hardware resources can be distributed flexibly according to different algorithms and tasks. The DSPs are mainly used to process the complex signal processing algorithms, and the FPGA mainly deals with the data transmission and sends the control commands. When the radar signal processing task is heavy and troublesome, the board can be extended as a higher level of signal processing machine using linkports. Every functional part of the signal board is carefully considered and designed, and the circuit design of each part is also finished. The PCB is designed, and the task of layout and route is completed. Finally, the linkport protocal is designed and the simulated.