Fpga Core Analog Circuit Design,

FPGA was the abbreviation of the Field Programmable Gate Array .With the development of FPGA design technology and craft technology, the distance of performance between FPGA and ASIC become smaller and smaller. Compared FPGA with ASIC, FPGA decreased the risk and cost in the product design, for its character of the dynamic reuse, and shorten the time which the product come into the market, so more and more circuit design companys participate in FPGA research and design.This research subject came from Chengdu Sino Microelectronics Technology Company. It aimed at researching analog circuit design of the FPGA chip, including programmable I/O interface circuit and the SRAM power system. It breaks through the adverse situation as all of the FPGA products and design technology were monopolized by several American companies, and promote the national FPGA design.IO main include output BUFFER and input BUFFER. As to output BUFFER design, in meeting the electrical characteristics of the various IO standards, this paper trade-off the SSN noise and IO speed, and design an output BUFFER which supports multiple interface standards, SSN noise suppression, and at least 840Mb/s IO speed. For input BUFFER design, according standards'electrical requirements, the input BUFFER is chosen a different input comparator. One of comparators is complementary self-biased CMOS differential amplifier (VCDA), which has wide input common mode voltage range, PVT-insensitive, and high speed. This design meets the requirement of the FPGA.For the power design of the SRAM, the circuit uses a capacitor-less LDO structure. The output voltage of the LDO is 1.58v, and the maximum output load current is 100mA. In the entire load current range, the LDO loop is always stable and has good DC and transient characteristic. The design satisfys the requirement of the SRAM power supply of the FPGA.This paper was based on a 0.13um 1P8M standard CMOS technology process, and on a design technology of custom layout. Applying Cadence-SpectreS simulated tool, the simulation result show that the core analog circuit design meets the requirements of the FPGA chip.