Low-voltage Low-power Full-swing Cmos Operational Amplifier Design And Simulation

In recent years, more and more electronic products with battery supply are widely used, which cries for adopting low voltage analog circuits to reduce power consumption, therefore low voltage, low power analog circuit design techniques are becoming research hotspot. When operational amplifier works in low supply voltage, the signal dynamic range reduces and the amplifier signal to noise radio reduces. In order to expand the signal dynamic range, the low voltage operational amplifier usually needs the input signal scope and the output signal scope to be able to achieve rail-to-rail. But the threshold voltage of transistor do not reduces when supply voltage reduces, solve the supply voltage and input signal limited by threshold voltage is becoming very important.A Level-Shifting circuit was proposed, which offer a Level-Shifting voltage for input stage. The whole circuit is realized in CSMC 0.5μm CMOS process parameters provided by foundry for level 49, the input stage use the NMOS tube and the PMOS tube parallel supplementary differential input pair structure; the middle gain stage use the low voltage, wide swing cascode structure which is suitable to work in low voltage; the output stage use the traditional Class A to reach rail-to-rail. To obtain high frequency zero and pole splitting, place the compensation capacitor between the source of the cascode devices and the output nodes in the frequency compensation circuit. The bias circuit is designed based on Supply-Independent Biasing, provides the stable bias current and the bias voltage for the operational amplifier.The designed circuit is simulated by HSPICE. With a single 1.3V supply voltage, the input common mode range of op-amp and output spring achieve rail-to-rail on the whole, and the dc gain is 106dB while the unit gain bandwidth is 5.2MHz, and phase margin is 55°;the power supply rejection ratio of op-amp is 93dB ,it has good ability of reject the wave of supply power; the common mode rejection ratio of op-amp is 115dB ,it has good ability of amplify differential signal and reject the common signal; the positive slew rate and negative slew rate of op-amp is 2.9V / fis and 6.7V /μs respectively; the power dissipation of op-amp is 178μW; when the supply voltage was equal to or lower than the sum of NMOS threshold voltage and PMOS threshold voltage, the op-amp can also work well. The structure of op-amp is simple and compact and all of pre-defined specifications of the designed circuit are satisfied with the simulation results, the op-amp reaches low-voltage low-power and rail-to-rail.