Precision rail-to-rail input-output operational amplifier using laser-trimmable poly-silicon resistors in standard CMOS process

Precision operational amplifiers have many applications in sensor-based systems found in industrial control and instrumentation devices, where a high degree of accuracy is needed for measurement. An important parameter of a precision amplifier is the input referred offset voltage, which is used to determine its DC accuracy. Device mismatch and package induced mechanical stress on the die have an influence on the input offset voltage. Furthermore, the temperature variations in the operating environment can affect the associated drift of offset voltage. These factors tend to limit the DC accuracy and the dynamic range of an amplifier utilized for high precision applications. To overcome this performance issue, most commercial precision amplifiers exploit an integrated circuit (IC) trimming technique that can reduce the initial input offset voltage. Continuous-time laser trimming of resistors at wafer level is one such IC trimming method.;The circuit is implemented using the TSMC 0.18 mum CMOS process and operates from a single supply of 3.3V. Test results have been presented and show a successful implementation of the amplifier at silicon level. Also, the experimental trimming sequence methodology has been proven successful. Laser-trimmed offset voltages of less than 30 muV at mid-supply and 110 muV over the entire input common mode range have been achieved for various samples of the amplifier.;The dissertation presents the design of a standalone precision CMOS rail-to-rail input-output (I/O) operational amplifier with embedded laser-trimmable poly silicon resistors. The work investigates a method of laser trimming of P-type poly silicon resistors compatible with standard-CMOS processes for reducing the input offset voltage. An analysis is presented to develop the trimming sequence methodology in order to reduce the input offset voltage over the full input common mode range of a rail-to-rail input stage. An on-chip PTAT bias circuitry is also designed to maintain the performance of the amplifier over process variations and operate over a range of -40°C to +85°C.