.6 Gsps, Parallel Data Acquisition System Hardware Design

Along with the rapid development of testing technology, data acquisition system is widely used in many special fields, such as the development of station economy, national defense improvement and scientific experiments.The higher sampling frequency can be a truer reflection of the outside world. Parallel alternating time sampling is the main technical line to improve the sampling frequency. At present, for the blockade in high speed ADC supply by the foreign companies, the real-time sampling rate of domestic products can only achieve 2GSPS.These products can not meet the current needs in the area of high-speed real-time. This dissertation submits the real-time sampling rate 6GSPS parallel data acquisition system issues to solve technology bottleneck in field of the high-performance data acquisition. First of all, the dissertation illustrates the necessity of parallel data acquisition system design. This paper closely focuses on three plans of 6GSPS parallel data acquisition system, which makes a comprehensive analysis on advantages and disadvantages of each plan. Then it deals with the design of the best acquisition system in detail and the problems. The main contents are as follows.1st: The overall design of parallel data acquisition system includes the system design based on the basic theories of data acquisition. We design three overall plan of system achievement by parallel sampling and comprehensively analyse these plans.2nd:Detailed design of 6GSPS parallel data acquisition system contains ADC characteristics and work patterns, concrete realization of the sampling clock, acquisition l clock phase regulation, the synchronous circuit design of output data stream at the posterior end of acquisition.3rd:The author analyzes the design of power system as well as the potential problems of signal integrality in the high-speed circuit system, and offers the correspondent measures to solve the problems.