Ldpc Codes To Achieve The Parallel Concatenated Code Research

LDPC (Low density parity check code) is a class of linear group code, which has sparse check matrix. It not only has good performance (could approach Shannon limit), but also has low decoding complexity and flexible structure. Recent years, LDPC code has already become the hotspot of channel coding domain and widely applied in deep space communications, optical fiber communications and satellite communications, etc.The excellent performance makes LDPC code become one of the optional channel codes of IEEE802.16e standard. LDPC code in IEEE802.16e standard is a structural LDPC code and is created by circular right shift based on some base matrixes. These features make LDPC code's encoder and decoder based on IEEE802.16e standard simpler and has higher parallel degree and data throughput rate.In the beginning of this paper, the constitutions of digital communication system and channel-coding technology's evolution and sort have been introduced. Then the LDPC code, which researched in this paper, has been educed, and its fundamentals, constructing, encoding and decoding arithmetic have been briefly introduced afterward. And then, by analyze the LDPC code defined by IEEE802.16e standard, a fast encoding arithmetic for LDPC code in IEEE802.16e standard has been found, a hardware construction for the implementing of fast encoding has been put forward, and the concrete circuit has been designed on FPGAs. Thereafter, the normalized Min-Sum decoding arithmetic and layer-decoding strategy have been selected, and the decoder, which based on the IEEE802.16e standard, has been implemented. Finally, the co-verification of Matlab and Quartus II has convinced that the encoder and decoder could work correctly and reliably.Moreover, the based on IEEE802.16e standard's Parallel Concatenated Low density parity check (PC-LDPC) has been researched in this paper. After introducing the encoder construction, decoder construction and decoding arithmetic, the low complexity decoding arithmetic has been emphasized, and a hardware realizable decoding arithmetic, called normalized PC-LDPC-Min-Sum arithmetic, has been found. Simulations convinced that PC-LDPC code has excellent performance.