Low density parity code (LDPC) is a channel encode which has outstanding performance, low error floor and can be implemented with fast data transfer speed. With the increasement of man's demand and the high speed and performance feature of Ultra Wide Band (UWB) system, this paper is focus on the research of LDPC for UWB, and proposes a method of design LDPC parity matrix with the constraints of hardware implementation. And this paper improves the algorithm based on Layered schedule and Min-Sum algorithm which can achieve high speed. An LDPC decoder which can achieve over 1G bps on 0.13um CMOS standard technology is designed compatible with Wimedia channel encode rate 1/2 and 3/4. At last a test system based on guass channel generator is used to verify this decoder on Xilinx Vertex 5 FPGA. |