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High-voltage Fet Modeling Program

Posted on:2010-02-05Degree:MasterType:Thesis
Country:ChinaCandidate:Z N WangFull Text:PDF
GTID:2208360275491393Subject:Electronics and communication engineering
Abstract/Summary:PDF Full Text Request
According to the patent item,we test and collected the experiment data of NLDMOS.Then we analyzed the measurement data and combined them with the process and physical thesis.And refer to the formula of the resistor of the LDMOS drift region in process simulation method.After we got the drift resistor physical formula,a core model transistor was based on bsim3v3 which its drain node was connected with the drift resistor and constructed a simple equal circuit of macro model.Based on the simple macro model,the quasi-saturation,pumping ionization and self-heating effect were considered in it and take some circuit element replace of them in the sub-circuit.At last a more complex and accuracy macro model was got.In order to validate the model' s accuracy and reasonability,we translated it into HSPICE language and save as an HSPICE model card,an accuracy model was released by fitting model parameters through a modeling tool named MBP.By simulation on spice tools and comparison with the measurement device data,the final model card was validated and proved its good characterization.
Keywords/Search Tags:LDMOS, macro-model, drift region
PDF Full Text Request
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