Hardware supported task scheduling on dynamically reconfigurable SoC architectures

Dynamically Reconfigurable System on a Chip (RSoC) technology features embedded microprocessors that are immersed on the same die within a significant amount of programmable logic fabric. Such technology is emerging as a viable alternative to conventional embedded computing configurations that typically utilize a combination of board-level general-purpose processors and Application-Specific Integrated Circuits (ASICs). In RSoC architectures the line between software and hardware has become increasingly blurred with the major challenge being how to utilize the flexible but still limited RSoC hardware and software resources in an effective manner for a given application. Previous research to answer this challenge has faced difficulties in dealing with nondeterministic systems of task whose run-time characteristics (e.g., execution time and execution condition of tasks) are not well known a priori. This dissertation develops a comprehensive strategy to tackle such problems. It first introduces a computational task model that can be used to represent nondeterministic systems in a general manner. The dissertation also presents a new multi-heuristic driven hardware/software partitioning algorithm that takes into account the performance/resource costs trade-offs and constraints. The major contribution of this dissertation is the development of a dynamic task scheduling algorithm and its hardware implementation that will perform the on-line scheduling of such task systems onto the RSoC type architecture. The goal of this scheduler is to minimize the application's execution time by means of reducing reconfiguration overhead that is present in reconfigurable hardware and to reuse as much as possible, in a temporal manner, the available reconfigurable hardware fabric that is present in the RSoC throughout the life of the application. To study the effectiveness of the proposed dynamic scheduler, traditional software-based simulation techniques have been utilized and a simulation framework has been developed that captures the important attributes of the targeted RSoC environment as well as the proposed multitasking microarchitecture. The results from extensive simulations demonstrate the benefits of the proposed dynamic scheduling approach as compared with that of other static scheduling techniques taken from the technical literature that have less realistic assumptions.