Airborne Sar Real-time Processor Compression Processing Hardware Design And Implementation

Synthetic Aperture Radar (SAR) is a kind of high-resolution imaging radar, and has 24-hour, all-weather capabilities. With the development of SAR technology, the SAR has an increasingly high-resolution and widely used in civilian and military fields. Now, real-time imaging radar is a hot research field in many states. However, the real-time and the characteristics of the huge volume of computing make it difficult to develop the hardware of the SAR imaging processor.The development of digital signal processing (DSP) technology makes it possible to develop a real-time high-resolution SAR imaging processor. Now, FPGA or DSP is the main platform to implement SAR processor, each of them has own advantages. Based on specific research project, this paper will detail a hardware implementation of FPGA-based SAR real-time processor, then brief introduce a SAR processor design based on DSP. The thesis includes specific to the following aspects:1) According to SAR real-time imaging algorithm and system parameters, select the design of based on three FPGAs, each FPGA responsible for a step of the image algorithm.2) Details of the software design of compression algorithm based on FPGA, including using the Altera FFT core to complete the FFT/IFFT computing, PCI local bus interface design, and data transmission between PCB.3) Details of the hardware of compression board and the test results, including chip selection, the allocation of resources within the FPGA, FPGA configuration, the design of PCI port, power supply and parallel data port,.4) Briefly introduce the design of DSP-based SAR real-time processor.The project completed the hardware design of FPGA-based SAR real-time processor, which has a high civilian and military value. This thesis is the work of the core of the whole project, which played an important role for the successful completion of the subject.