| The data volume and computation task of Synthetic Aperture Radar (SAR) is huge, very high speed computation is necessary for SAR real-time processing. The computation task of SAR is concentrate on range and azimuth compressions, usual measure of compression is using high speed DSP, this way was considered as the best way of real-time SAR processing in hardware, but FPGA technique is improving so fast that it has become a better way to realize compression than DSP.The main contents of this thesis can be concluded as following:According to the task of the project, based on discussion of SAR key system parameter, select the FPGA chip EP1S25F672C7 of ALTERA Co. to realize the core algorithm of this SAR processing system.Be in charge of the task of FPGA in the system, achieve the software programming and hardware debugging of FPGA. The whole system has been tested using the original data and get perfect performance.Design the protocol of data transmission between boards, ensure the stability and accuracy of transmission.Discuss using better FPGA chip to realize SAR real-time processing system of higher performance and more data, it's a base for future research.This project has realized the SAR real-time imaging system utilizing FPGA, which is valuable in military and civil application. The work of this paper is the key of this project, which is significant in achieving the project. |