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The Image Signal Processor (isp), Implementation And Fpga Verification

Posted on:2008-01-06Degree:MasterType:Thesis
Country:ChinaCandidate:J XueFull Text:PDF
GTID:2208360242964205Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
ISP is the abbreviation of Image Signal Processor. It processes the data from the CMOS sensor as ASIC. It recovers, enhances the image, and makes the output image be close to the real world which people feel.Introduce the theory of the CMOS sensor, the necessity of the image's post processing, and the output format from the sensor—bayer pattern. Then propose the ISP's flow, and analyze some important modules including the theories and the algorithms. Meanwhile compare the advantages and disadvantages of the algorithms and bring some new methods and ideas. At last, complete the hardware implement and the verification at FPGA. In ISP, take turns to analyze the linearity correction, de-noise, de-defect, interpolation, AWB, AEC, also take some optimizations. Finally complete the synthesis and download the circuit into the FPGA, and check the each module's function and each step's effect.
Keywords/Search Tags:ISP, LC, filter, interpolation, AWB, AEC, FPGA
PDF Full Text Request
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