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Design And Implementation Of Video Processing System Based On Dsp + Fpga Architecture

Posted on:2007-04-08Degree:MasterType:Thesis
Country:ChinaCandidate:Q ZhangFull Text:PDF
GTID:2208360212966256Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
The research of Digital video and Digital image have gone throuth half a century, and have obtained lots of progress in theory and engineering.Nowadays, the research and process of video signal is the emphase of signal processing. This paper introduces a design and construction of video realtime image processing system which is based on TI's high performance DSP TMS320C6416. And the system is implemented based on the DSP&FPGA co-processing. The DSP is the video processing core unit; And the video capture unit, the video pre-processing unit, the video display unit are implemented in the FPGA. High data throughput is achieved by utilizing a glueless interface between DSP and FPGA, which is beyond 480MB/s. A bus switch separates DSP from FPGA. When the bus switch is off, the system becomes a system with Dual-Core processors. The system can run a more complex algorithm for the processing capability of Dual-Core processors.By using the EDMA channel linking mechanism of DSP, this system can transport video data from the FPGA unit to L2 cache of DSP without CPU interference, thus improving the performance and diminishing the system burden. A fast target recognition algorithm is achieved in the DSP unit. Then the image processing program is burned into Flash, and a second-level bootloader is developed, which will automatically copy the user's program from Flash to L2 sram after the ROM boot.The SDRAM controller is proficient at the memory management in the FPGA unit. The decoder and encoder are configured by the i2c controller. The video per-processing module can obtain the target's pattern according to the frame difference algorithm. The mouse is drived by the PS/2 controller. This system uses high-speed FIFO implemented in FPGA as the interconnection in modules to achieve the high speed buffering of the video data, which successfully solves the clock mismatch and bandwidth mismatch problem in modules. The On Screen Display module is designed to realize the human-system-interaction and to display the processing result.Leverage the advantage and disadvantage of DSP and FPGA, the system assign...
Keywords/Search Tags:Video signal processing, DSP&FPGA co-processing, Dual-Core processors, EDMA channel linking and chaining, Memory management
PDF Full Text Request
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